Foundations and Trends® in Electronic Design Automation > Vol 4 > Issue 4

System-in-Package: Electrical and Layout Perspectives

Lei He, University of California, USA, lhe@ee.ucla.edu Shauki Elassaad, Stanford University, USA, shauki@stanford.edu Yiyu Shi, Missouri University of Science and Technology, USA, yshi@mst.edu Yu Hu, University of Alberta, CANADA, bryanhu@ece.ualberta.ca Wei Yao, University of California, USA, weiyao@ee.ucla.edu
 
Suggested Citation
Lei He, Shauki Elassaad, Yiyu Shi, Yu Hu and Wei Yao (2011), "System-in-Package: Electrical and Layout Perspectives", Foundations and TrendsĀ® in Electronic Design Automation: Vol. 4: No. 4, pp 223-306. http://dx.doi.org/10.1561/1000000014

Published: 30 Jun 2011
© 2011 L. He, S. Elassaad, Y. Shi, Y. Hu and W. Yao
 
Subjects
System Level Design
 

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In this article:
1 Introduction
2 IC Package Tutorial
3 System-in-Package Design Exploration
4 Placement and Routing for SiP
References

Abstract

The unquenched thirst for higher levels of electronic systems integration and higher performance goals has produced a plethora of design and business challenges that are threatening the success enjoyed so far as modeled by Moore's law. To tackle these challenges and meet the design needs of consumer electronics products such as those of cell phones, audio/video players, digital cameras that are composed of a number of different technologies, vertical system integration has emerged as a required technology to reduce the system board space and height in addition to the overall time-to-market and design cost. System-in-package (SiP) is a system integration technology that achieves the aforementioned needs in a scalable and cost-effective way, where multiple dies, passive components, and discrete devices are assembled, often vertically, in a package. This paper surveys the electrical and layout perspectives of SiP. It first introduces package technologies, and then presents SiP design flow and design exploration. Finally, the paper discusses details of beyond-die signal and power integrity and physical implementation such as I/O (input/output cell) placement and routing for redistribution layer, escape, and substrate.

DOI:10.1561/1000000014
ISBN: 978-1-60198-458-6
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Table of contents:
1: Introduction
2: IC Package Tutorial
3: System-in-Package Design Exploration
4: Placement and Routing for SiP
References

System-in-Package

With the increasing scalability of semiconductor processes, the higher-level of functional integration at the die level, and the system integration of different technologies needed for consumer electronics, System-in-Package (SiP) is the new advanced system integration technology, which integrates (or vertically stacks) within a single package multiple components such as CPU, digital logic, analog/mixed-signal, memory, and passive and discrete components in a single system. System-in-Package: Electrical and Layout Perspectives focuses on electrical and layout perspectives, as opposed to discussing thermal and mechanic characteristics of SiP. It first introduces package technologies, and then presents SiP design flow and design exploration. Finally, the paper discusses details of beyond-die signal and power integrity and physical implementation such as IO (input/output cell) placement and routing for redistribution layer, escape, and substrate. System-in-Package: Electrical and Layout Perspectives is an invaluable reference for EDA researchers, professionals and graduate students.

 
EDA-014