Foundations and Trends® in Electronic Design Automation > Vol 4 > Issue 2–3

Radiation-induced Soft Errors: A Chip-level Modeling Perspective

Norbert Seifert, Intel Corporation, Logic Technology Development Q&R, USA, norbert.seifert@intel.com
 
Suggested Citation
Norbert Seifert (2010), "Radiation-induced Soft Errors: A Chip-level Modeling Perspective", Foundations and Trends® in Electronic Design Automation: Vol. 4: No. 2–3, pp 99-221. http://dx.doi.org/10.1561/1000000018

Published: 27 Nov 2010
© 2010 N. Seifert
 
Subjects
Circuit Level Design,  Test
 

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In this article:
1 Introduction
2 The Physics of Soft Errors in a Terrestrial Radiation Environment
3 SER Trends
4 SER Modeling Approaches
Acknowledgments
A Appendices
References

Abstract

Chip-level soft-error rate (SER) estimation can come from two sources: direct experimental measurement and simulation. Because SER mitigation decisions need to be made very early in the product design cycle, long before product Si is available, a simulation-based methodology of chip-level radiation-induced soft error rates that is fast and reasonably accurate is crucial to the reliability and success of the final product.

The following contribution summarizes selected publications that are deemed relevant by the author to enable a truly chip-level radiation-induced soft error rate estimation methodology. Although the strategies and concepts described have microprocessors manufactured in bulk CMOS technologies in mind, there is no fundamental reason why they cannot be applied to other technologies and different types of integrated circuits (ICs).

DOI:10.1561/1000000018
ISBN: 978-1-60198-394-7
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ISBN: 978-1-60198-395-4
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Table of contents:
1: Introduction
2: SER Fundamentals
3: The Physics of Soft Errors in a Terrestrial Radiation Environment
4: SER Trends
5: SER Modeling Approaches
Acknowledgements
Appendices
References

Radiation-induced Soft Error

Radiation-induced Soft Errors: A Chip-level Modeling Perspective summarizes and discusses selected publications that enable a truly chip-level radiation-induced soft error rate estimation methodology. Although the strategies and concepts described have microprocessors manufactured in bulk CMOS technologies in mind, there is no fundamental reason why they cannot be applied to other technologies and different types of integrated circuits (ICs). Radiation-induced Soft Errors: A Chip-level Modeling Perspective starts by introducing the key strategy for modeling chip-level soft error rates (SER) used throughout the book. It goes on to discuss important types of single-event phenomena. The focus is mainly on radiation-induced phenomena that result in soft errors i.e., upsets that do not cause permanent damage. It continues to address the terrestrial particle environment and charge generation and collection processes. The next section summarizes SER trends of key SER contributors, while SER modeling methods are also discussed. It concludes by illustrating how all components can be put together in a truly chip-level capable SER strategy and tool. Radiation-induced Soft Errors: A Chip-level Modeling Perspective is an invaluable reference for anyone from academe or industry with an interest in this increasingly important topic.

 
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