Foundations and Trends® in Electronic Design Automation > Vol 6 > Issue 3

Addressing Process Variations at the Microarchitecture and System Level

Siddharth Garg, University of Waterloo, Canada, s6garg@ecemail.uwaterloo.ca Diana Marculescu, Carnegie Mellon University, USA, dianam@ece.cmu.edu
 
Suggested Citation
Siddharth Garg and Diana Marculescu (2013), "Addressing Process Variations at the Microarchitecture and System Level", Foundations and TrendsĀ® in Electronic Design Automation: Vol. 6: No. 3, pp 217-291. http://dx.doi.org/10.1561/1000000031

Published: 08 Apr 2013
© 2013 S. Garg and D. Marculescu
 
Subjects
System Level Design,  Stochastic Optimization
 
Keywords
Er Computer EngineeringPf SemiconductorsEe Electrical Engineering
 

Free Preview:

Article Help

Share

Download article
In this article:
1 Introduction
2 Process Variation Macro-Models
3 Compositional Analysis for Multi-core Systems
4 System Level Variability Mitigation Techniques
5 Future Research Directions
Acknowledgments
References

Abstract

Technology scaling has resulted in an increasing magnitude of and sensitivity to manufacturing process variations. This has led to the adoption of statistical design methodologies as opposed to conventional static design techniques. At the same time, increasing design complexity has motivated a shift toward higher levels of design abstraction, i.e., micro-architecture and system level design. In this survey, we highlight emerging statistical design techniques targeted toward the analysis and mitigation of process variation at the system level design abstraction, for both conventional planar and emerging 3D integrated circuits. The topics covered include variability macro-modeling for logic modules, system level variability analysis for multi-core systems, and system level variability mitigation techniques. We conclude with some pointers toward future research directions.

DOI:10.1561/1000000031
ISBN: 978-1-60198-658-0
87 pp. $65.00
Buy book
 
ISBN: 978-1-60198-659-7
87 pp. $115.00
Buy E-book
Table of contents:
1: Introduction
2: Process Variation Macro-Models
3: Compositional Analysis for Multi-core Systems
4: System Level Variability Mitigation Techniques
5: Future Research Directions
Acknowledgements
References

Addressing Process Variations at the Microarchitecture and System Level

Technology scaling has resulted in an increasing magnitude of and sensitivity to manufacturing process variations. This has led to the adoption of statistical design methodologies as opposed to conventional static design techniques. At the same time, increasing design complexity has motivated a shift towards higher levels of design abstraction, i.e., micro-architecture and system level design. This book provides the reader with an introduction to recently proposed techniques that address one or more of these challenges. It surveys emerging statistical design techniques targeted towards the analysis and mitigation of process variation at the system level design abstraction, for both conventional planar and emerging 3D integrated circuits. The topics covered include variability macro-modeling for logic modules, system level variability analysis for multi-core systems, and system level variability mitigation techniques. The book uses illustrative and detailed examples to help explain the various techniques covered. It concludes with some pointers to future work that looks beyond conventional CMOS technology and highlights the relevance of system level variability analysis and mitigation techniques for emerging technologies.

 
EDA-031

Copyright © 2017 now publishers inc.
Boston - Delft