Foundations and Trends® in Electronic Design Automation > Vol 1 > Issue 4

Statistical Performance Modeling and Optimization

Xin Li, Department of ECE, Carnegie Mellon University, USA, xinli@ece.cmu.edu Jiayong Le, Extreme DA, 165 University Avenue, USA, kelvin@extreme-da.com Lawrence T. Pileggi, Department of ECE, Carnegie Mellon University, USA, pileggi@ece.cmu.edu
 
Suggested Citation
Xin Li, Jiayong Le and Lawrence T. Pileggi (2007), "Statistical Performance Modeling and Optimization", Foundations and TrendsĀ® in Electronic Design Automation: Vol. 1: No. 4, pp 331-480. http://dx.doi.org/10.1561/1000000008

Published: 08 Aug 2007
© 2007 X. Li, J. Le and L. T. Pileggi
 
Subjects
Physical Design
 

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In this article:
1 Introduction
2 Process Variations
3 Transistor-Level Statistical Methodologies
4 System-Level Statistical Methodologies
5 Robust Design of Future ICs
Acknowledgments
References

Abstract

As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing processes have introduced unavoidable and significant uncertainty in circuit performance; hence ensuring manufacturability has been identified as one of the top priorities of today's IC design problems. In this paper, we review various statistical methodologies that have been recently developed to model, analyze, and optimize performance variations at both transistor level and system level. The following topics will be discussed in detail: sources of process variations, variation characterization and modeling, Monte Carlo analysis, response surface modeling, statistical timing and leakage analysis, probability distribution extraction, parametric yield estimation and robust IC optimization. These techniques provide the necessary CAD infrastructure that facilitates the bold move from deterministic, corner-based IC design toward statistical and probabilistic design.

DOI:10.1561/1000000008
ISBN: 978-1-60198-056-4
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ISBN: 978-1-60198-057-1
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Table of contents:
1: Introduction
2: Process Variations
3: Transistor-Level Statistical Methodologies
4: System-Level Statistical Methodologies
5: Robust Design of Future ICs
Acknowledgments
References

Statistical Performance Modeling and Optimization

Statistical Performance Modeling and Optimization reviews various statistical methodologies that have been recently developed to model, analyze and optimize performance variations at both transistor level and system level in integrated circuit (IC) design. The following topics are discussed in detail: sources of process variations, variation characterization and modeling, Monte Carlo analysis, response surface modeling, statistical timing and leakage analysis, probability distribution extraction, parametric yield estimation and robust IC optimization. These techniques provide the necessary CAD infrastructure that facilitates the bold move from deterministic, corner-based IC design toward statistical and probabilistic design. Statistical Performance Modeling and Optimization reviews and compares different statistical IC analysis and optimization techniques, and analyzes their trade-offs for practical industrial applications. It serves as a valuable reference for researchers, students and CAD practitioners.

 
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